CMOS plasmonic waveguides co-integrated with LPCVD-based Si3N4 via a butt-coupled interface

Plasmonic technology has attracted intense research interest enhancing the functional portfolio of photonic integrated circuits (PICs) by providing Surface-Plasmon-Polariton (SPP) modes with ultra-high confinement at sub-wavelength scale dimensions and as such increased light matter interaction. However, in most cases plasmonic waveguides rely mainly on noble metals and exhibit high optical losses, impeding their employment in CMOS processes and their practical deployment in highly useful PICs. Hence, merging CMOS compatible plasmonic waveguides with low-loss photonics by judiciously interfacing these two waveguide platforms appears as the most promising route towards the rapid and costefficient manufacturing of high-performance plasmo-photonic integrated circuits. In this work, we present butt-coupled plasmo-photonic interfaces between CMOS compatible 7μm-wide Aluminum (Al) and Copper (Cu) metal stripes and 360×800nm Si3N4 waveguides. The interfaces have been designed by means of 3D FDTD and have been optimized for aqueous environment targeting their future employment in biosensing interferometric arrangements, with the photonic waveguides being cladded with 660nm of Low Temperature Oxide (LTO) and the plasmonic stripes being recessed in a cavity formed between the photonic waveguides. The geometrical parameters of the interface will be presented based on detailed simulation results, using experimentally verified plasmonic properties for the employed CMOS metals. Numerical simulations dictated a coupling efficiency of 53% and 68% at 1.55μm wavelength for Al and Cu, respectively, with the plasmonic propagation length Lspp equaling 66μm for Al and 75μm for Cu with water considered as the top cladding. The proposed interface configuration is currently being fabricated for experimental verification.